EECS

Post Graduate Admissions, May 2017

Provisional results:

The Department of Electrical Engineering conducted its summer evaluations for grad school/PG (M. Tech and MS/Ph. D)  admissions in the period May 15 - May 18, 2017. Admission evaluations for both research-focused MS/Ph. D., and defined-coursework M. Tech programs were conducted over this period. The information below is set to be retained for reference until the next evaluations in December, 2017. Archived information is italicized.

  1. May 23, 2017: Provisional list of selected candidates for the EEZ program has been finalized.

Shortlisting criteria:

  1. April 28, 2017: Shortlisting criteria for Masters-level programs (EEA, EEE, EEN, EEP, EES, EET, JOP, as well as EEY) have been finalized.
  2. May 2, 2017: Shortlisting criteria for Ph. D. programs (EEZ and OEZ) have been finalized.
  3. May 5, 2017: Shortlisting criteria for Masters-level program JVL have been finalized.

The short-listed candidates have been sent an email invitation. If you feel you satisfy the shortlisting criteria but have not received an invitation, please do come in for the interviews on the appropriate dates. However, please bring along relevant transcripts as evidence with you to justify your case.

Program details, evaluation dates and results:

  • Research-interested applicants are encouraged to familiarize themselves with the research interests of EE faculty prior to their arrival. Coursework in MS and Ph. D. programs is customized to fit the research problem the student and the advisor intend to work on.
Program Code Description Date of Evaluation
EEY Master of Science by Research

MS(R)
May 16-17
EEZ and OEZ Doctor of Philosophy

Ph. D.
May 18

The Department has finalized the list of provisionally admitted candidates in the EEZ (Ph. D.) program. The selected candidates will receive an email with further instructions, very soon.

Program Code Description Available Streams Credit Composition Date of Evaluation
JVL M. Tech in VLSI Design Tools and Technology

Please visit the VDTT webpage for greater details.
1. ASIC and SoC Design
2. Micro and Nano Devices
3. Embedded Intelligent Systems
Program Core: 18
Program Elective: 30
Open Elective: 0
Total: 48
May 15 (stage 1: VDTT PEC))
 
May 16 (stage 2: sponsor, for shortlisted candidates from stage 1)
JTM M. Tech in Telecommunication Technology & Management

Please visit the Bharti School webpage for greater details.
1. Signal and Information Processing
2. Communication Systems
3. Telecom Management
4. Telecom Analytics
5. Embedded Systems and Network Appliance Engineering
6. Computer and Communication Networks
Program Core: 33
Program Elective: 21
Open Elective: 0
Total: 54
May 15
JOP M. Tech in Optoelectronics and Optical Communication

Please visit the OEOC webpage for greater details.
Not applicable Program Core: 24
Program Elective: 27
Open Category: 0
Total: 51
May 15
EEA M. Tech in Control and Automation Not applicable Program Core: 24
Program Elective: 18
Open Category: 6
Total: 48
May 16-17
EEE M. Tech in Communication Engineering 1. Communication Systems
2. Information Processing
Program Core: 24
Program Elective: 18
Open Category: 6
Total: 48
May 16-17
EEN M. Tech in Integrated Electronics and Circuits 1. VLSI Design
2. Nanoelectronics and Photonics
3. Embedded Intelligent Systems
Program Core: 24
Program Elective: 18
Open Category: 6
Total: 48
May 16-17
EEP M. Tech in Power Electronics, Electrical Machines and Drives Not applicable Program Core: 24
Program Elective: 18
Open Category: 6
Total: 48
May 16-17
EES M. Tech in Power Systems Not applicable Program Core: 24
Program Elective: 18
Open Category: 6
Total: 48
May 16-17
EET M. Tech in Computer Technology 1. Cognitive and Intelligent Systems
2. Embedded Intelligent Systems
3. Computer Communication and Networks
4. Multimedia Information Processing
5. Internet Technologies
Program Core: 21
Program Elective: 24/27
Open Category: 3/6
Total: 51
May 16-17

Note. The above details are based on the latest information received from the Departmental Research Committee.

Required documentation:

You must carry the following documentation with you:

  • Currently valid government-issued identity proof.
  • Originals of obtained degrees and associated transcripts + one self-attested copy of each.
  • Theses, and copies of publications, if any.
  • Official GATE score (for non-exempt Masters-level applicants) + one self-attested copy of the score.
  • Receipt for your online application.
  • Any other relevant documents (experience / sponsorship / no objection / SC / ST / OBC / PH) + one self-attested copy of each.

Document originals will be returned to you after verification.

Venue and reporting time

All the evaluations (except JTM) will be conducted at the Lecture Hall Complex. Please report to LH.512 (so, level 5) at 8:30 AM on the day of your evaluations (see the tables above). Your documentation will first be verified, followed by the appropriate evaluations. JTM candidates should report to Bharti School.

Accommodations:

Limited accommodation on campus is available for EE candidates:

  1. Male applicants (all except JTM): Shivalik Hostel. Caretaker: +91-11-2659-6946.
  2. Male applicants (JTM): Udaigiri Hostel. Caretaker: +91-11-2659-6897.
  3. Female applicants: Kailash Hostel. Caretaker: +91-11-2659-6839.

All applicants must furnish a Demand Draft in favor of "DEANS DISCRETIONARY FUND <HOSTELNAME> HOSTEL".

Boarding and lodging charges will be ₹230 per day. Bedding is extra at ₹50 per day.

Mandatory: you will need to supply an undertaking at the time of checkin that you will not use any motor vehicles while on campus.

Contact:

EE Office (Attention : Mr. Yatindra Mani Tripathy): +91-11-2659-6102
Email : admissionee@ee.iitd.ac.in
Either click on the email address above OR
In the subject area of your email, please state: [APPL NO: ... ] [FULL NAME: ....] [Bachelors SCORE:...] [GATE DISCIPLINE .... and GATE SCORE:....]