Post Graduate Admissions, December 2016
The Department of Electrical Engineering will conduct its winter evaluations for grad school/PG admissions on December 5 and 6, 2016. Applicants are encouraged to familiarize themselves with the research interests of EE faculty prior to their arrival.
Evaluations will be conducted for admission to two programs:
- Program code: EEY (MS program). Shortlisting criteria. December 6. Provisional results (EEY).
- Program code: EEZ (Ph. D. program). Shortlisting criteria. December 5 & 6. Provisional results (EEZ).
The above details are based on the latest information received from the Departmental Research Committee.
You must carry the following documentation with you:
- Currently valid government-issued identity proof.
- Originals of obtained degrees and associated scores.
- Theses, and publications, if any.
- Official GATE score (for non-exempt EEY applicants).
- Receipt for your online application.
Venue and time
Plan to reach Department of Electrical Engineering (Block II). At 9 AM on the day of the interview, report to the Department office for document verification. After that is done, proceed to any one of the following five interview panels, depending on your intended area of specialization:
|Thematic Group Panel
||Research Areas of Interest||Venue|
|Communications(COMM)||Signal Processing, Speech and Image Processing, Coding & Information Theory, Communication Systems, Optoelectronics, Optical Communications, Communication Networks, Wireless and Mobile Communications, Microwaves, Antennas.||Communication Lab (MS.202)|
|Computer Technology (CTECH)||
Computer Vision, Multimedia Systems, Image Processing, Computer Networks, Computer Architecture, Embedded Systems, Mobile computing, soft computing, Pattern Recognition, Artificial Intelligence, Machine Learning, Information Technology, Music information retrieval, Bioinformatics.
||Embedded Lab (II.320)|
|Control(CTRL)||Robust Control, Robotics, Mechatronics, Nonlinear Control, Biological
Systems, Sliding mode control, System Identification, Simulation and Control, Computational Methods for Modelling.
|Control Lab (II.214)|
|Integrated Electronics & Circuits (IEC)||Micro and nanoelectronics; semiconductor materials and devices; VLSI design; analog, mixed-signal and digital circuit design; CMOS image sensors; MEMS; flexible electronics; functional nanomaterials; sensors & actuators; optoelectronics, photonics and solar cells; compact modelling and device design; material, device and circuit characterization; memory; neuromorphic design; device fabrication and packaging; instrumentation and integration.
||Electronics Lab (II.402)|
|Power (PWR)||Electrical Machines, Energy Conversion, Power Electronics, Power Quality, Drives, Powers System, Protection, Stability, Optimisation, Energy Conservation, HVDC & FACTS, Computer Applications in Power (computational intelligence, microcomputer/DSP control, CAD software & application) Renewable Energy Systems (Small Hydro, PV, Wind), Energy Audit & Efficiency.
||PG Machine Lab (II.116)|
Note: "II" refers to block number II. "MS" refers to the Main Building. Room numbers indicate floor levels: 1xx is ground floor, 4xx is top floor, and so on. MS.202 is most easily accessed from block II.
- Male applicants: Zanskar Hostel. Caretaker: +91-11-2659-7055.
- Female applicants: Kailash Hostel. Caretaker: +91-11-2659-6839.
Cost of boarding and lodging (no bedding): ₹ 230/day.
Mode of payment: Demand Draft favouring "Deans Discretionary Fund <hostel name> Hostel".
Mandatory: you will need to supply an undertaking at the time of checkin that you will not use any motor vehicles while on campus.
Contact:EE Office (Attention : Mr. Yatindra Mani Tripathy): +91-11-2659-6102
Email : email@example.com
Either click on the email address above OR
In the subject area of your email, please state: [APPL NO: ... ] [FULL NAME: ....] [Bachelors SCORE:...] [GATE DISCIPLINE .... and GATE SCORE:....]